1. Field
The following description relates to a semiconductor device with voids within a Silicon-On-Insulator (SOI) structure and a method of forming the semiconductor device. Voids are formed within a Buried Oxide layer (BOX layer) of the Silicon-On-Insulator (SOI) semiconductor and a performance index of a Radio Frequency-Silicon On Insulator (RF-SOI) switch is enhanced.
2. Description of Related Art
To improve a performance of the RF-SOI switch, i.e., a performance index (FOM) defined as (Ron*Coff), the product of a resistance value being on state resistance (Ron) and a capacitance value being an off state (Coff) of a switch device is required to be minimized to minimize a switching loss. A FOM may be minimized without increasing the manufacturing cost.
It has been suggested to use a copper interconnect instead of aluminum to lower a resistance value in an on state (Ron), or to use a material (referred to as a Low-K material) having a dielectric permittivity (or dielectric constant) lower than standard dielectrics (Silicon dioxide for example) to reduce a capacitance in an off state. However, the implementation of such improvements would require additional expensive equipment, which would increase the cost of manufacturing.
Furthermore, if a Trap-Rich layer is added into the SOI semiconductor (typically as an additional layer at the interface of the BOX layer and of the Handle Silicon substrate layer) in order to enhance an RF characteristic, the cost increases by at least 10% or more. Also, as discussed above, a process that adds the Trap-Rich layer requires additional equipment. Therefore, it would be beneficial to realize RF-SOI Switches that have lower FOM and do not require the use of expensive Trap-Rich layers within the SOI semiconductor.
Thus, there is a demand for a method of providing an SOI wafer in which a device performance is increased without a Trap-Rich layer and without the need for expensive Copper metallization or the use of Low-K dielectrics.